5/13/2013

555 Pulse Generator

Description:
A 555 pulse generator circuit with a difference, the initial pulse is tailored by additional circuitry to match the duration of subsequent pulses.
Notes:
The NE555 and the First Pulse
The first positive pulse from a classic 555-based oscillator is always 1.6 times longer than the following pulses. The difference is caused by the fact that only during the first cycle C2 starts charging up from 0 V. This is generally not a problem, but sometimes this first pulse just should be the same length as the rest - at least approximately.
The picture shows the oscillator and an addition to it (everything to the right from the Vs-Gnd axis) that can solve the problem. Immediately after switch-on, C2 is empty and the voltage on the gate of Q2 is low. Q2 is off and it makes C2 charge up very quickly through Q1 and R3 until it reaches just below Vs/3. Then Q2 turns on, Q1 turns off, and the classic circuit continues to charge and discharge C2 relatively slowly between 2Vs/3 and Vs/3. As the voltage on C2 never again drops below Vs/3, Q2 now conducts all the time and Q1 is permanently off.
A MOSFET with a lower D-S resistance would charge up C2 even quicker.
The component values may be critical. For best results, the R5/R7 voltage divider should turn Q2 on when C2 is charged up to just a little below Vs/3. This point is set by the R5/R7 ratio. But if the value of R5 is too high or if R7 is too small (depending on the supply voltage and the G-S threshold voltage of Q2), the oscillator may not work at all. The sum of R5 and R7 should be as high as possible in order to minimize the influence on the main part of the circuit after the first pulse.

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The working of this electronic circuit is very simple. The voltage to be measured is converted into a digital equivalent by the ADC inside the IC and then this digital equivalent is decoded to the seven segment format and then displayed. The ADC used in ICL7107 is dual slope type ADC. The process taking place inside our ADC can be stated as follows. For a fixed period of time the voltage to be measured is integrated to obtain a ramp at the output of the integrator. Then a known reference voltage of opposite polarity is applied to the input of the integrator and allowed to ramp until the output of integrator becomes zero. The time taken for the negative slope to reach zero is measured in terms of the IC’s clock cycle and it will be proportional to the voltage under measurement. In simple words, the input voltage is compared to an internal reference voltage and the result is converted in a digital format.

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Circuit diagram.

Notes.

    Assemble the circuit on a good quality PCB.
    The circuit can be powered from a +/_5V dual supply.
    For calibration, power up the circuit and short the input terminals. Then adjust R6 so that the display reads 0V.
    The ICL7107 is a CMOS device and it is very sensitive to static electricity. So avoid touching the IC pins with your bare hands.
    The seven segment displays must by common anode type.
    I assembled this circuit few years back and it is still working fine.



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